Nanocoils are coiled circuits, including memory devices and other circuits. Nanocoils have great potential for superdense memory and power FET applications due to nanocoils' enormous surface storage and periphery area to volume ratio. Previously, a 100× improvement over planar memory has been experimentally realized by using stress ridges to force concentric coiling on polycrystalline silicon (Si) nanocoil. A typical Si nanocoil may be fabricated from silicon nitride/silicon (Si3Ni4/Si). The nitride is a stressed nitride that provides coiling stress cause the formation of the nanocoils when released from an underlying substrate. Such a nanocoil is capable of 100× greater volume density than conventional ICs.
A standard fabrication technique of polycrystalline Si nanocoils involves reactive ion etching (RIE) through coiling layers to expose an oxide release layer and then dipping in hydrofluoric (HF) acid to dissolve the oxide release layer (RIE is a variation of plasma etching in which during etching, semiconductor wafer being etched is placed on a RF powered electrode. The semiconductor wafer takes on potential which accelerates etching species extracted from plasma toward the etched surface. Chemical etching reaction is preferentially taking place in the direction normal to the surface, i.e., etching is more anisotropic than in plasma etching but is less selective). Such a technique is referred to as a “wet” etch technique because of the use of HF acid dip. Attempts to apply this same wet etch technique to single crystalline Si nanocoils with a buried oxide layer (BOX) were unsatisfactory because a longer HF dip time was required, resulting in the dissolution of at least some of the stressed nitride layer to be dissolved. The dissolution of the stressed nitride layer reduced or eliminated the coiling stress, reducing the amount of coiling. Furthermore, such technique limited the nanocoil yield, typically to narrow sections of the silicon surface. The wet etch technique, therefore, is not compatible with standard high reliability fabrication techniques.